
target = soft/blink.asm 
out = build

rtl_src = ../rtl/top.v  
pcf_file = io.pcf

# ROM 的大小  最大 255 
ROM_SIZE = 256

ifeq ($(OS),Windows_NT)
export ICE_TOOLS_BIN=d:/msys64/mingw64/bin/
export ICESPROG = tools/icesprog 
else
export ICE_TOOLS_BIN=
export ICESPROG = icesprog 
endif 

START_TIME := $(shell cat /proc/uptime | awk -F "." '{print $$1}') # Makefile进入，获取时间戳


default:synth 8M prog_flash showruntime

firmware:
	@mkdir -p $(out)
	python3 ./assemble.py $(target) $(ROM_SIZE) > $(out)/firmware.hex 

sim:firmware
	@mkdir -p $(out)
	iverilog -o $(out)/tb.vvp -I rtl -y rtl -I rtl tb.v 
	@cd $(out) && vvp tb.vvp 

#快速仿真
%:
	@mkdir -p $(out)
	python3 ./assemble.py ./soft/$@.asm $(ROM_SIZE) > $(out)/firmware.hex 
	iverilog -o $(out)/tb.vvp -I rtl -y rtl tb.v 
	@cd $(out) && vvp tb.vvp 

synth: firmware 
	@mkdir -p $(out) 
	@cp *.pcf $(out) 
	cd $(out)  && $(ICE_TOOLS_BIN)yosys -p "synth_ice40 -json synth.json -blif synth.blif "  $(rtl_src)
ifeq ($(OS),Windows_NT)
	cd $(out) && $(ICE_TOOLS_BIN)nextpnr-ice40 --lp1k --package cm36 --json synth.json --pcf $(pcf_file) --asc synth.asc --freq 72
else 
	cd $(out) && arachne-pnr -d 1k -P cm36 -p $(pcf_file)  synth.blif -o synth.asc
endif
	cd $(out) && $(ICE_TOOLS_BIN)icepack synth.asc synth.bin 

prog_flash:
	$(ICESPROG) $(out)/synth.bin


# 设置时钟频率
8M:
	$(ICESPROG) -c 1

12M:
	$(ICESPROG) -c 2

36M:
	$(ICESPROG) -c 3

72M:
	$(ICESPROG) -c 4

showruntime:
	@current_time=`cat /proc/uptime | awk -F "." '{print $$1}'`; \
	time_interval=`expr $${current_time} - $(START_TIME)`; \
	runtime=`date -u -d @$${time_interval} +%Hh:%Mm:%Ss`; \
	echo "runtime: $${runtime} "


clean:
	@rm -rf $(out)